By 2015, the number of networked devices is predicted to be double the global population. Subsequently, the amount of data to be processed through the network and stored in the cloud is predicted to increase fourfold over the next 5 years. The network will need to be more efficient to process and deliver this staggering amount of video, voice and applications quickly and securely.
By converting from purpose-built solutions to an open platform with Intel architecture, telecom equipment manufacturers can reuse code and scale across product lines to achieve faster time-to-market and reduce costs. This flexible approach to building communications equipment allows manufacturers and service providers to cost-effectively manage the billions of intelligent devices predicted to connect through the network infrastructure.
The new Intel Xeon processor E5-2600 family, along with the Intel Data Plane Development Kit (Intel DPDK), enables telecom equipment manufacturers to consolidate three communications workloads onto a single Intel architecture platform. This capability allows service providers to deliver new services and handle greater network traffic loads.
The Intel Xeon processor E5-2600 family provides the increased performance, integrated I/O and increased memory capacity required for compute-intensive communications infrastructure applications.
The Intel Xeon processor E5-2600 family is the first server platform to offer an eight-core option, which provides up to a 67 percent performance boost compared to the previous generation. This higher performance capability allows manufacturers to consolidate application, control and packet processing onto Intel architecture to reduce the number of platforms supported, lower energy consumption and decrease costs. By standardizing on Intel architecture, manufacturers can also create one design and then develop a family of communications products with the range of processor offerings – eight cores with 16 threads or six cores with 12 threads.
By integrating I/O into the platform, the Intel Xeon processor E5-2600 allows for more network bandwidth to attach to higher-performing Ethernet controllers. The integration of PCI Express 3.0 also eliminates the need for a separate I/O hub, helping save board real estate compared to the previous generation’s three-chip solution. Additionally, PCI Express 3.03 doubles the bandwidth delivered, increasing from 10 Gig to 40 Gig throughputs.
The low-power and robust thermal profile processor options offered specifically for the communications infrastructure (E5-2658 and E52648L) are ideal for smaller form-factor applications with thermal constraints, such as blades. These two processor options are appropriate for solutions requiring compliance with Advanced TCA form-factor specifications or deployment in NEBS environments where the profile must survive natural disasters or loss of all fans for up to 360 hours. Intel also offers manufacturing availability of up to 7 years to support the longer life cycle of systems in the communications market segment.
The optimized libraries of the Intel DPDK remove packet handling inefficiencies and allow for breakthrough packet processing performance. Combined with the Intel Xeon processor E5-2600 family, the Intel DPDK enables manufacturers to quickly migrate packet processing solutions to Intel architecture. The kit also allows developers to easily scale packet processing tasks across available processors and cores to further scale performance as future Intel platforms include even more processors, cores and innovations. The Intel DPDK is designed to work on any Intel architecture platform to scale to meet unique performance requirements.
Signal processing on the Intel Xeon processor E5-2600 family is now a viable option with the Intel SPDK along with continued improvements in multi-core architectures. The Intel SPDK provides the software and tools needed to take advantage of the increased parallelism from Intel Advanced Vector Extensions, along with other processor performance improvements, to enable efficient execution of data parallel workloads such as digital transforms and filters. By consolidating signal processing with other workloads onto Intel architecture in areas that include aerospace, media processing and healthcare, it is also possible to save on hardware costs, simplify application development and reduce time to market.